Display and electronic device comprising display

ABSTRACT

A display according to an embodiment includes a display panel including a plurality of pixels, a gate driver electrically connected to each of the plurality of pixels, a source driver including first type amplifiers and second type amplifiers selectively connected to each of the plurality of pixels, a graphic random access memory (GRAM) that stores image data, and a controller electrically connected to the gate driver, the source driver, and the GRAM. In addition, it is possible to implement various embodiment understood through the disclosure.

TECHNICAL FIELD

Embodiments of the disclosure relates to a technique for reducing power consumption of a display.

BACKGROUND ART

With the development of mobile communication technology, electronic devices including displays such as smartphones and wearable devices have been widely used. Such an electronic device may execute various functions such as taking a picture or a video, playing a music file or a video file, playing a game, and the Internet through a display.

However, since the display is exposed only through the front of the electronic device, it may be inconvenient to simultaneously execute the above functions. For example, when a user wants to check a message received while playing a video file, the user may stop the playing video file and then check the message or split the screen to check the message. Accordingly, in recent years, technologies for maximizing the size of a display have been developed. For example, technologies related to displays that are exposed through the side of the electronic device are being developed.

DISCLOSURE Technical Problem

As the size of a display is expanded, the power consumption of the display may increase. For example, when the grayscale voltages of 256 levels are continuously applied to an area output through the front surface and an area output through the side of the display, the power consumption of the display may increase. When the power consumption of the display increases, battery consumption may also increase, so that the time for which the electronic device is usable may be reduced, thereby making the user inconvenient.

Aspects of the disclosure are to address at least the above-mentioned problems and/or disadvantages and to provide at least the advantages described below. Accordingly, an aspect of the disclosure is to provide a display and an electronic device.

TECHNICAL SOLUTION

According to an embodiment of the disclosure, a display may include a display panel including a plurality of pixels, a gate driver electrically connected to each of the plurality of pixels, a source driver first type amplifiers and second type amplifiers selectively connected to each of the plurality of pixels, a graphic random access memory (GRAM) that stores image data, and a controller electrically connected to the gate driver, the including source driver, and the GRAM, where the controller may turn on the plurality of pixels through the gate driver, connect a first pixel area to which the image data are output to the first type amplifiers, and connect a second pixel area to which the image data are not output to the second type amplifiers in a state where the plurality of pixels are turned on, transmit a first signal to the first pixel area to allow the first pixel area to output the image data, and transmit a second signal to the second pixel area to allow the second pixel area to emit light at a specified brightness.

According to another embodiment of the disclosure, an electronic device may include a housing that includes a first surface, a second surface facing the first surface, and a side surface surrounding a space between the first and second surfaces, a display panel exposed through the first surface and a portion of the side surface of the housing, a processor that generates image data, a graphic random access memory (GRAM) that stores at least a piece of the image data, and a controller that selects at least a piece of the stored image data and outputs the selected part to a specified area of the display panel, where the specified area of the display panel corresponds to at least a portion of the side surface.

Advantageous Effects

According to the embodiments of the disclosure, the power consumption of a display may be reduced.

In addition, various effects that are directly or indirectly understood through the disclosure may be provided.

DESCRIPTION OF DRAWINGS

FIG. 1A is a view illustrating an electronic device and a display panel according to an embodiment.

FIG. 1B is a view illustrating an electronic device according to another embodiment.

FIG. 2 is a block diagram of an electronic device according to an embodiment.

FIG. 3 is a flowchart illustrating an operation of an electronic device according to an embodiment.

FIG. 4 is a view illustrating an electronic device that selects and outputs image data to a display panel according to an embodiment.

FIG. 5 is a diagram illustrating an electronic device that enlarges selected image data at a specified magnification and outputs the same to the display panel 120 according to an embodiment.

FIG. 6 is a diagram illustrating an electronic device that encodes the selected image data and stores the encoded image data in the GRAM 142 according to an embodiment.

FIG. 7 is a diagram illustrating an electronic device for outputting image data having the same size through encoding and decoding processes according to an embodiment.

FIG. 8 is a block diagram of a display according to an embodiment.

FIG. 9A is an enlarged view of a display panel and a source driver according to an embodiment.

FIG. 9B is an enlarged view of a display panel and a source driver according to another embodiment.

FIG. 9C is a detailed block diagram of a gamma block according to an embodiment.

FIG. 10 is a flowchart illustrating an operation of a display according to an embodiment.

FIG. 11A is a view illustrating that image data are output to a portion of a display panel.

FIG. 11B is a view illustrating an operation timing of a gate driver, a first type amplifier, and a second type amplifier according to an embodiment.

FIG. 12A is a view illustrating that image data are output to a portion of a display panel according to another embodiment.

FIG. 12B is a view illustrating that an operation timing of a gate driver, a first type amplifier, and a second type amplifier according to another embodiment.

FIG. 13A is a view illustrating that image data are output to all areas of a display panel according to an embodiment.

FIG. 13B is a view illustrating that image data are output in an area except for a corner of a display panel according to an embodiment.

FIG. 13C is a view illustrating a display panel in which image data are output to area ‘a’ according to an embodiment.

FIG. 13D is a view illustrating a display panel in which image data are output to area ‘b’ according to an embodiment.

FIG. 13E is a view illustrating a display panel in which image data are output to areas ‘a’ and ‘b’ according to an embodiment.

FIG. 13F is a view illustrating a display panel in which image data are output to a front area and area ‘a’ according to an embodiment.

FIG. 13G is a view illustrating a display panel in which image data are output to a front area and area ‘b’ according to an embodiment.

FIG. 13H is a view illustrating a display panel in which image data are output to area ‘c’ according to an embodiment.

FIG. 13I is a view illustrating a display panel in which image data are output to area ‘d’ according to an embodiment.

FIG. 13J is a view illustrating a display panel in which image data are output to areas ‘c’ and ‘d’ according to an embodiment.

FIG. 14 is a block diagram of an electronic device according to another embodiment.

FIG. 15 illustrates an electronic device in a network environment system, according to various embodiments.

FIG. 16 illustrates a block diagram of an electronic device, according to various embodiments.

FIG. 17 illustrates a block diagram of a program module, according to various embodiments.

MODE FOR INVENTION

Hereinafter, various embodiments of the disclosure may be described with reference to accompanying drawings. Accordingly, those of ordinary skill in the art will recognize that modification, equivalent, and/or alternative on the various embodiments described herein can be variously made without departing from the scope and spirit of the disclosure. With regard to description of drawings, similar components may be marked by similar reference numerals.

In the disclosure, the expressions “have”, “may have”, “include” and “comprise”, or “may include” and “may comprise” used herein indicate existence of corresponding features (e.g., components such as numeric values, functions, operations, or parts) but do not exclude presence of additional features.

In the disclosure, the expressions “A or B”, “at least one of A or/and B”, or “one or more of A or/and B”, and the like may include any and all combinations of one or more of the associated listed items. For example, the term “A or B”, “at least one of A and B”, or “at least one of A or B” may refer to all of the case (1) where at least one A is included, the case (2) where at least one B is included, or the case (3) where both of at least one A and at least one B are included.

The terms, such as “first”, “second”, and the like used in the disclosure may be used to refer to various components regardless of the order and/or the priority and to distinguish the relevant components from other components, but do not limit the components. For example, “a first user device” and “a second user device” indicate different user devices regardless of the order or priority. For example, without departing the scope of the disclosure, a first component may be referred to as a second component, and similarly, a second component may be referred to as a first component.

It will be understood that when an component (e.g., a first component) is referred to as being “(operatively or communicatively) coupled with/to” or “connected to” another component (e.g., a second component), it may be directly coupled with/to or connected to the other component or an intervening component (e.g., a third component) may be present. In contrast, when an component (e.g., a first component) is referred to as being “directly coupled with/to” or “directly connected to” another component (e.g., a second component), it should be understood that there are no intervening component (e.g., a third component).

According to the situation, the expression “configured to” used in the disclosure may be used as, for example, the expression “suitable for”, “having the capacity to”, “designed to”, “adapted to”, “made to”, or “capable of”. The term “configured to” must not mean only “specifically designed to” in hardware. Instead, the expression “a device configured to” may mean that the device is “capable of” operating together with another device or other parts. For example, a “processor configured to (or set to) perform A, B, and C” may mean a dedicated processor (e.g., an embedded processor) for performing a corresponding operation or a generic-purpose processor (e.g., a central processing unit (CPU) or an application processor) which performs corresponding operations by executing one or more software programs which are stored in a memory device.

Terms used in the disclosure are used to describe specified embodiments and are not intended to limit the scope of the disclosure. The terms of a singular form may include plural forms unless otherwise specified. All the terms used herein, which include technical or scientific terms, may have the same meaning that is generally understood by a person skilled in the art. It will be further understood that terms, which are defined in a dictionary and commonly used, should also be interpreted as is customary in the relevant related art and not in an idealized or overly formal unless expressly so defined in various embodiments of the disclosure. In some cases, even if terms are terms which are defined in the disclosure, they may not be interpreted to exclude embodiments of the disclosure.

An electronic device according to various embodiments of the disclosure may include at least one of, for example, smartphones, tablet personal computers (PCs), mobile phones, video telephones, electronic book readers, desktop PCs, laptop PCs, netbook computers, workstations, servers, personal digital assistants (PDAs), portable multimedia players (PMPs), Motion Picture Experts Group (MPEG-1 or MPEG-2) Audio Layer 3 (MP3) players, mobile medical devices, cameras, or wearable devices. According to various embodiments, the wearable device may include at least one of an accessory type (e.g., watches, rings, bracelets, anklets, necklaces, glasses, contact lens, or head-mounted-devices (HMDs), a fabric or garment-integrated type (e.g., an electronic apparel), a body-attached type (e.g., a skin pad or tattoos), or a bio-implantable type (e.g., an implantable circuit).

According to various embodiments, the electronic device may be a home appliance. The home appliances may include at least one of, for example, televisions (TVs), digital versatile disc (DVD) players, audios, refrigerators, air conditioners, cleaners, ovens, microwave ovens, washing machines, air cleaners, set-top boxes, home automation control panels, security control panels, TV boxes (e.g., Samsung HomeSync™, Apple TV™, or Google TV™), game consoles (e.g., Xbox™ or PlayStation™), electronic dictionaries, electronic keys, camcorders, electronic picture frames, and the like.

According to another embodiment, an electronic device may include at least one of various medical devices (e.g., various portable medical measurement devices (e.g., a blood glucose monitoring device, a heartbeat measuring device, a blood pressure measuring device, a body temperature measuring device, and the like), a magnetic resonance angiography (MRA), a magnetic resonance imaging (MRI), a computed tomography (CT), scanners, and ultrasonic devices), navigation devices, Global Navigation Satellite System (GNSS), event data recorders (EDRs), flight data recorders (FDRs), vehicle infotainment devices, electronic equipment for vessels (e.g., navigation systems and gyrocompasses), avionics, security devices, head units for vehicles, industrial or home robots, automated teller machines (ATMs), points of sales (POSs) of stores, or internet of things (e.g., light bulbs, various sensors, electric or gas meters, sprinkler devices, fire alarms, thermostats, street lamps, toasters, exercise equipment, hot water tanks, heaters, boilers, and the like).

According to an embodiment, the electronic device may include at least one of parts of furniture or buildings/structures, electronic boards, electronic signature receiving devices, projectors, or various measuring instruments (e.g., water meters, electricity meters, gas meters, or wave meters, and the like). According to various embodiments, the electronic device may be one of the above-described devices or a combination thereof. An electronic device according to an embodiment may be a flexible electronic device. Furthermore, an electronic device according to an embodiment of the disclosure may not be limited to the above-described electronic devices and may include other electronic devices and new electronic devices according to the development of technologies.

Hereinafter, electronic devices according to various embodiments will be described with reference to the accompanying drawings. In the disclosure, the term “user” may refer to a person who uses an electronic device or may refer to a device (e.g., an artificial intelligence electronic device) that uses the electronic device.

FIG. 1A is a view illustrating an electronic device and a display panel according to an embodiment. FIG. 1B is a view illustrating an electronic device according to another embodiment.

Referring to FIG. 1A, an electronic device 100 may include a housing 110 and a display panel 120.

The housing 110 may define an appearance of the electronic device 100. For example, the housing 110 may include a first surface 112, a second surface 114, and a side surface 116. The first surface 112 may transmit light generated by the display panel 120. In addition, on the first surface 112, a user may touch a part of the body (e.g., a finger) to perform a touch (including a touch using an electronic pen). For example, the first surface 112 may be formed of tempered glass, tempered plastic, a flexible polymer material, or the like, to protect components included in the electronic device 100 from external impact. In the disclosure, the first surface 112 may be referred to as the front surface or cover glass of the electronic device 100.

The second surface 114 may be a surface opposite to the first surface 112. The second surface 114 may be formed of tempered glass, plastic injection molding material, metal, or the like. According to an embodiment, the second surface 114 may be implemented to be attachable or detachable by a user. In the disclosure, the second surface 114 may be referred to as a rear cover, a rear case, a rear plate, or the like.

The side surface 116 may be a surface surrounding a space between the first and second surfaces 112 and 114. According to an embodiment, the side surface 116 may transmit light generated by the display panel 120 like the first surface 112. Further, on the side surface 116, the user may touch a part of the body to perform a touch. According to an embodiment, the side surface 116 may be configured as a curved surface to naturally output the light generated by the display panel 120.

The display panel 120 may be exposed through at least a portion of the first surface 112 and the side surface 116. For example, a front area 122 of the display panel 120 may be exposed through the first surface 112, and a side area 124 of the display panel 120 may be exposed through the side surface 116. That is, the front area 122 of the display panel 120 may be parallel to the first surface 112, and the side area 124 may be parallel to the side surface 116.

According to an embodiment, the display panel 120 may be applied to an electronic device 200 shown in FIG. 1B. For example, a center area 210 of the electronic device 200 may be flat or curved. Side surfaces 220 a and 220 b of the electronic device 200 may be curved. In this case, the front area 122 of the display panel 120 may be exposed through the center area 210 of the electronic device 200. At least a portion of the side area 124 of the display panel 120 may be exposed through the side surfaces 220 a and 220 b of the electronic device 200.

FIG. 2 is a block diagram of an electronic device according to an embodiment.

Referring to FIG. 2, the electronic device 100 may include a processor 130, a display driver integrated circuit (DDI) 140, and the display panel 120.

The processor 130 (e.g., an application processor (AP) 130) may generate image data. The image data may refer to data to be output through the display panel 120. For example, the image data may include an image, text, a video, and the like to be output through the display panel 120. The processor 130 may transmit generated image data to the DDI 140.

According to an embodiment, the processor 130 may encode the generated image data in a first scheme (e.g., a display stream compression (DSC) scheme) specified by the video electronics standards association (VESA). As a result, the image data may be compressed to reduce the size of the data (e.g., the size of the image). When data size is reduced, data capacity may be also reduced. For example, the capacity of the image data may be reduced from 10 Mbytes to 5 Mbytes. The processor 130 may transmit the encoded image data to the DDI 140.

Unlike the example described above, the encoding process may be omitted or bypassed. In this case, the processor 130 may transmit the unencoded image data to the DDI 140.

The DDI 140 may include a graphic random access memory (GRAM) 142, a controller 144, a decoder 146, and an up-scaler 148. The GRAM 142 may store image data generated by the processor 130. According to an embodiment, when the processor 130 encodes image data, the GRAM 142 may store the encoded image data. The GRAM 142 may be referred to as a frame buffer or a line buffer.

According to an embodiment, the GRAM 142 may store at least a piece of the image data generated by the processor 130. For example, when the image data are one image, the GRAM 142 may store a partial area of the image. According to various embodiments, when the image data includes a plurality of images, any one of the plurality of images may be stored.

The controller 144 may select at least a piece of image data stored in the GRAM 142. For example, the controller 144 may select at least a piece of the image data based on an image data address in the GRAM 142 and/or a size of the image data. The controller 144 may be referred to as a command controller (e.g., 1436 of FIG. 14), a GRAM controller (e.g., 1437 of FIG. 14), and a timing controller (e.g., 1438 of FIG. 14).

According to an embodiment, the controller 144 may select at least a piece of the image data stored in the GRAM 142 under a specified condition. For example, when the processor 130 is in a sleep mode, the controller 144 may select at least a piece of the image data stored in the GRAM 142 and output the selected portion to the display panel 120. Thus, a low power always-on-display (AOD) and a self-display without intervention of the processor 130 may be implemented. In the disclosure, the “sleep mode” may refer to a state in which the processor waits for user input.

When the image data selected by the controller 144 is encoded, the decoder 146 may decode the selected image data in a second scheme. According to an embodiment, when the image data selected by the controller 144 is not encoded, the decoding process may be omitted or bypassed.

The up-scaler 148 may enlarge the size of the image data at a specified magnification. According to an embodiment, when the image data selected by the controller 144 is small or must be enlarged according to a user setting, the up-scaler 148 may enlarge the size of the selected image data. When the image data selected by the controller 144 do not require magnification, the magnification process may be omitted or bypassed.

The display panel 120 may output the enlarged image data. In this case, the display panel 120 may output the image data to the side area.

In the disclosure, the contents described with reference to FIG. 2 may be applied to the components having the same reference numerals as those of the electronic device 100 shown in FIG. 2.

FIG. 3 is a flowchart illustrating an operation of an electronic device according to an embodiment. The flowchart shown in FIG. 3 illustrates an operation of the electronic device 100 shown in FIG. 2.

Referring to FIG. 3, in operation 301, the processor 130 may generate image data. The generated image data may be encoded by the processor 130 and transmitted to the DDI 140. In addition, the generated image data may be transmitted to the DDI 140 without the encoding process.

In operation 303, the GRAM 140 may store at least a piece of the image data received from the processor 130. According to an embodiment, when the image data include a plurality of images, the GRAM 140 may set addresses for the images and store the image in the addresses, respectively. In addition, when the image data are one image, the GRAM 140 may set addresses for parts of the image and store the parts in the addresses, respectively.

In operation 305, the controller 144 may select at least a piece of the image data stored in the GRAM 140. For example, when the image data include a plurality of images, the controller 144 may select any one of the plurality of images. According to another embodiment, when the image data are one image, the controller 144 may select a partial area of the image.

According to an embodiment, the controller 144 may select at least a piece of the image data stored in the GRAM 140 under a specified condition. For example, when the processor enters the sleep mode, the controller 144 may select at least a piece of the stored image data.

In operation 307, the display panel 120 may output the selected image data to a specified area. For example, the display panel 120 may output the selected image data to the side area 124.

FIG. 4 illustrates an electronic device that selects and outputs image data to a display panel according to an embodiment.

Referring to FIG. 4, the GRAM 142 may store image data 401, 402, 403, and 404. For example, the GRAM 142 may store the image data 401, 402, 403, and 404 in at least one of areas ‘a’ to ‘d’ 124 a to 124 d. In the disclosure, the areas ‘a’ and ‘b’ 124 a and 124 b may be areas located at upper and lower ends of the side area 124 shown in FIG. 1, respectively. Meanwhile, the areas ‘c’ and ‘d’ 124 c and 124 d may be areas located at the left and right sides of the side area 124, respectively.

The controller 144 may select at least a piece of the image data 401, 402, 403, and 404 stored in the GRAM 142. For example, as shown in FIG. 4, the image data 401 stored in the area ‘a’ 124 a may be selected among the stored image data 401, 402, 403, and 404. In this case, the controller 144 may select at least a piece of the image data 401, 402, 403, and 404 based on the address or size of the image data.

The controller 144 may output the selected image data 401 to a specified area of the display panel 120. For example, the selected image data 401 may be output to any one of the areas ‘a’ to ‘d’ 124 a to 124 d. In addition, as shown in FIG. 4, the controller 144 may output the selected image data 401 to the areas ‘a’ and ‘b’ 124 a and 124 b or to the areas ‘c’ and ‘d’ 124 c and 124 d.

According to an embodiment, the controller 144 may output, to a specified area of the display, the image data selected based on a user setting. For example, when the electronic device 100 enters the sleep mode, the user may set the image data to be displayed on the area ‘a’ 124 a. In this case, the controller 144 may select the image data 401 among the stored image data 401, 402, 403, and 404 and output the image data 401 to the area ‘a’ 124 a.

FIG. 5 is a diagram illustrating an electronic device that enlarges selected image data at a specified magnification and outputs the same to the display panel 120 according to an embodiment.

Referring to FIG. 5, the GRAM 142 may store image data 501, 502, 503, and 504 which are output to the areas ‘a’ to ‘d’ 124 a to 124 d and have the sizes smaller than each area. For example, when the number of pixels arranged in the area ‘a’ 124 a is 160×1440, the number of pixels to which the image data 501 are output may be less than 160×1440.

The controller 144 may select at least a piece of the image data 501, 502, 503, and 504 stored in the GRAM 142. For example, as shown in FIG. 5, the image data 501 stored in the area ‘a’ 124 a may be selected from the stored image data 501, 502, 503, and 504. In this case, the up-scaler 148 may enlarge the size (e.g., the image size) of the image data 501 at a specified magnification. The enlarged image data 511 may have the same size as that of the area ‘a’ 124 a.

The controller 144 may output the enlarged image data 511 to a specified area of the display panel 120. For example, the enlarged image data 511 may be output to any one of the areas ‘a’ to ‘d’ 124 a to 124 d. In addition, as shown in FIG. 5, the controller 144 may output the enlarged image data 511 to the areas ‘a’ and ‘b’ 124 a and 124 b or the areas ‘c’ and ‘d’ 124 c and 124 d. When the enlarged image data 511 are output to the areas ‘c’ and ‘d’ 124 c and 124 d, the up-scaler 148 may enlarge the enlarged image data 511 again such that the size of the enlarged image data 511 corresponds to that of the area ‘c’ or ‘d’ 124 c or 124 d.

FIG. 6 is a diagram illustrating an electronic device that encodes the selected image data and stores the encoded image data in the GRAM 142 according to an embodiment.

Referring to FIG. 6, the controller 144 (or an encoder (not shown)) may encode image data 601, 602, 603, and 604 generated by the processor 130 in a first scheme. The encoded image data 611, 612, 613, and 614 may be compressed and stored in the GRAM 142. For example, when the image data 601, 602, 603, and 604 are compressed by 1/n times, the GRAM 142 may store the image data 611, 612, 613, and 614 1/n times larger than before encoding. In addition, the GRAM 142 may store image data n times larger than before encoding.

The controller 144 may select at least a piece of the image data 611, 612, 613, and 614 stored in the GRAM 142. For example, as illustrated in FIG. 6, the controller 144 may select the image data 611 stored in the area ‘a’ 124 a from the stored image data 611, 612, 613, and 614. In this case, the decoder 146 may decode the selected image data 611 in a second scheme.

The up-scaler 148 may enlarge the size of the decoded image data (e.g., the image size) at a specified magnification. The size of the enlarged image data 621 may be the same as the area ‘a’ 124 a.

The controller 144 may output the enlarged image data 621 to a specified area of the display panel 120. For example, the selected image data may be output to one of the areas ‘a’ and ‘b’ 124 a and 124 b.

FIG. 7 is a diagram illustrating an electronic device for outputting image data having the same size through encoding and decoding processes according to an embodiment.

First, describing a process (route ‘A’) of outputting first image data 711, the processor 130 may generate the first image data 711 such that the first image data 711 are output through 2560×1440 pixels.

The processor 130 may encode the first image data 711 in the first scheme. The encoded first image data 712 may be compressed to reduce the size of the image data. As illustrated in FIG. 7, the encoded first image data 712 may have a size ⅓ times larger than before encoding. The encoded first image data 712 may be transmitted to the DDI 140.

The GRAM 142 may store the encoded first image data 712 when the encoded first image data 712 is transmitted.

The decoder 146 may decode the first image data 712 stored in the GRAM 142 in the second scheme. The decoded first image data 713 may be enlarged to increase the size of the image data. For example, the size of the decoded first image data 713 may be enlarged to be output through 2560×1440 pixels.

The controller 144 may output the decoded first image data 713 through the display panel 120.

Referring to FIG. 7 again, describing a process (route ‘B’) of outputting the second image data 721, the processor 130 may generate the second image data 721 to be output through 1920×1080 pixels. The generated second image data 721 may be transmitted to the DDI 140.

The controller 144 (or an encoder (not shown)) may encode the received second image data 721 in the first scheme. The encoded second image data 722 may be compressed to reduce the size of the image data. As shown in FIG. 7, the encoded second image data 722 may have a size ½ times larger than before encoding.

The GRAM 142 may store the encoded second image data 722.

The decoder 146 may decode the second image data 722 stored in the GRAM 142 in the second scheme. The decoded second image data may be enlarged to increase the size of the image data. For example, the size of the decoded second image data may be enlarged to output through 1920×1080 pixels.

The up-scaler 148 may enlarge the size of the decoded image data at a specified magnification. For example, as shown in FIG. 7, the up-scaler 148 may enlarge the decoded image data by 1.78 times. For example, the enlarged second image data 713 may be enlarged to be output through 2560×1440 pixels.

The controller 144 may output the enlarged second image data 713 through the display panel 120. According to an embodiment, the image data having the same size may be output through an encoding and/or decoding process.

FIG. 8 is a block diagram of a display according to an embodiment. Embodiments to be described below are embodiments for implementing the low power self-display described with reference to FIGS. 1A to 7.

Referring to FIG. 8, a display 800 according to an embodiment of the disclosure may include a GRAM 810, a controller 820, a gate driver 830, a source driver 840, and a display panel 850. Unless otherwise noted, the description of the GRAM 142, the controller 144, and the display panel 120 shown in FIG. 2 may be also applied to the GRAM 810, the controller 820, and the display panel 850 which will be described below.

The controller 820 may select at least a piece of the image data stored in the GRAM 810. The controller 820 may output the selected image data through the display panel 850. In this case, the controller 820 may control the gate driver 830 and the source driver 840 to output image data in a specified area of the display panel 850. For example, the controller 820 may control the turn on or off of pixels connected to a gate line through the gate driver 830. When the pixels are turned on, the controller 820 may control the brightness (e.g., luminous flux) of the turned on pixels through the source driver 840. The luminous flux may refer to the total amount of light emitted from the pixels.

The display panel 850 may be divided into a plurality of areas. For example, the display panel 850 may be divided into a front area 852 and side areas 854 a to 854 d and 854-1 to 854-4. Unless otherwise noted, the descriptions of the front area 122 and the side area 124 shown in FIG. 1 may also be applied to the front area 852 and the side areas 854 a to 854 d and 854-1 to 854-4.

The side areas 854 a to 854 d and 854-1 to 854-4 may be divided into area ‘a’ 854 a, area ‘b’ 854 b, area ‘c’ 854 c, area ‘d’ 854 d, a first area 854-1, a second area 854-2, a third area 854-3, and a fourth area 854-4. Unless otherwise noted, the descriptions of the areas ‘a’ to ‘d’ 124 a to 124 d illustrated with reference to FIG. 4 may also be applied to the areas ‘a’ to ‘d’ 854 a to 854 d. In the disclosure, the areas ‘c’ and ‘d’ 854 c and 854 d may be referred to as a glide.

The first to fourth areas 854-1 to 854-4 may be areas between the areas ‘a’ and ‘c’ 854 a and 854 c, between the areas ‘a’ and ‘d’ 854 a and 854 d, the areas ‘b’ and ‘c’ 854 b and 854 c, and the areas ‘b’ and ‘d’ 854 b and 854 d, respectively. In the disclosure, the first to fourth areas 854-1 to 854-4 may be referred to as a corner.

According to an embodiment, image data may be output to at least one of the areas 852, 854 a to 854 d, and 854-1 to 854-4. For example, the image data may be output through the front area 852 or the area ‘a’ 854 a. In this case, the pixels located in an area to which the image data are not output may be turned off or black data may be transmitted to an area to which the image data are not output. In the disclosure, the turn-on of an area or a pixel may mean a state in which a voltage (or current) is applied to the pixel (or a light emitting diode included in the pixel) so that the pixel emits light. To the contrary, the turn-off of an area or a pixel may mean a state in which the voltage (or current) applied to the pixel (or a light emitting diode included in the pixel) is blocked so that the pixel does not emit light.

Black data may mean a voltage of the lowest level among grayscale voltages (or a voltage having the smallest magnitude among the grayscale voltages). In addition, the black data may refer to a voltage in a specified range among the grayscale voltages. The grayscale voltage may refer to a voltage obtained by dividing a specified voltage into a plurality of steps.

In the disclosure, the contents described with reference to FIG. 8 may be applied to the components having the same reference numerals as the display 800 shown in FIG. 8.

FIG. 9A is an enlarged view of a display panel and a source driver according to an embodiment. FIG. 9B is an enlarged view of a display panel and a source driver according to another embodiment. FIG. 9A is a diagram related to an embodiment in which image data are output through the display panel 850. FIG. 9B is a diagram related to an embodiment in which image data are not output. FIG. 9C is a detailed block diagram of a gamma block according to an embodiment.

Referring to FIG. 9A, the display panel 850 may include a plurality of pixels. The plurality of pixels may be arranged in an area where gate lines 910 g and 920 g and data lines 910 d and 920 d intersect on the display panel 850. In the disclosure, the gate lines 910 g and 920 g may refer to a line through which a signal applied by the gate driver 830 is transmitted. The data lines 910 d and 920 d may refer to lines for transmitting signals applied from the source driver 840.

First, a process of outputting image data will be described. The gate driver 830 may apply a gate signal to the gate lines 910 g and 920 g. When the gate signal is applied, transistors 911 to 913 and 921 to 923 connected to the gate lines 910 g and 920 g may be sequentially turned on. In this case, a first gamma block 931 may transmit the grayscale voltage to decoders 991 to 993. A logic block 980 may transmit image data to the decoders 991 to 993 when the first gamma block 931 transmits a grayscale voltage.

The decoders 991, 992, and 993 may decode the grayscale voltage and image data and transmit the decoded grayscale voltage and image data to first type amplifiers 941 to 943. In this case, switches 951 to 953 may be shorted such that the decoded grayscale voltage and image data are transmitted to the first type amplifiers 941 to 943. The first type amplifiers 941 to 943 may amplify the decoded grayscale voltage and image data and transmit the amplified grayscale voltage and image data to light emitting diodes 911R, 912G, 913B, 921B, 922G, and 923R. The light emitting diodes 911R, 912G, 913B, 921B, 922G, and 923R may emit light based on the magnitude of the grayscale voltage to output the image data.

For example, when the gate driver 830 applies a gate signal through the first gate line 910 g, the transistors 911 to 913 may be sequentially turned on. In this case, the first gamma block 931 may transmit the grayscale voltage to the decoders 991 to 993. The logic block 980 may transmit the image data to the decoders 991 to 993.

The decoders 991 to 993 may decode and transmit the grayscale voltage and the image data to the first type amplifiers 941 to 943. The switches 951, 952, and 953 may be shorted to transmit the decoded grayscale voltage and image data. The first type amplifiers 941 to 943 may amplify the decoded grayscale voltage and image data and transmit the amplified grayscale voltage and image data to the light emitting diodes 911R, 912G, and 913B, respectively. When the amplified grayscale voltage and image data are transmitted, the red, green and blue light emitting diodes 911R, 912G and 913B may emit light based on the magnitude of the grayscale voltage. When the magnitude of the grayscale voltage is large, it may be bright, and when the magnitude of the grayscale voltage is small, it may be dark.

Next, when the gate driver 830 applies the gate signal through the second gate line 920G, the transistors 921 to 923 may be sequentially turned on. In this case, the first gamma block 931 may transmit a grayscale voltage to the decoders 991 to 993. The logic block 980 may transmit the image data to the decoders 991 to 993.

The decoders 991 to 993 may decode and transmit the grayscale voltage and image data to the first type amplifiers 941 to 943. The switches 951 to 953 may be shorted to transmit the decoded grayscale voltage and image data. The first type amplifiers 941 to 943 may amplify and transmit the decoded grayscale voltage and image data to the light emitting diodes 921B, 922G, and 923R, respectively. When the amplified grayscale voltage and image data are transmitted, the blue, green and red light emitting diodes 921B, 922G and 923R may emit light based on the magnitude of the grayscale voltage.

Although not shown in FIG. 9A, the above-described process may be repeatedly performed up to the n-th gate line. The n-th gate line may be the last gate line to which image data is output. According to an embodiment of the disclosure, the image data may be output to a specified area through the above-described process.

Referring to FIGS. 9A and 9B, a gamma block 930 transmits black data to pixels in an area to which image data are not output to control brightness (e.g., luminous flux) of the pixels. For example, when it is assumed that image data are output to the front area 852 and image data are not output to the areas ‘c’ and ‘d’ 854 c and 854 d, the first gamma block 931 may output the image data to the front area 852 through the process described with reference to FIG. 9A. In this case, a second gamma block 932 may transmit black data to the areas ‘c’ and ‘d’ 854 c and 854 d, and thus the lowest voltage among the grayscale voltages is applied to the pixels included in the areas ‘c’ and ‘d’ 854 c and 854 d. Therefore, the pixels included in the areas ‘c’ and ‘d’ 854 c and 854 d may emit light at a brightness similar to that in a state where the pixels are turned off.

Describing a process of transmitting black data to the areas ‘c’ and ‘d’ 854 c and 854 d in detail through a second type amplifier 960, first, the second gamma block 932 may apply a disable signal to a first point 961 of the second type amplifier 960. In this case, white data may be transmitted through a first line 981, and black data may be transmitted through a second line 982. In addition, a switch 970 may be shorted such that the white data and the black data are transmitted. In the disclosure, the white data may refer to a voltage of the highest level among the grayscale voltages (or the highest voltage among the grayscale voltages). The first line 981 may be referred to as a voltage high (VH) line, and the first line 981 may represent a line through which the white data are transmitted. The second line 982 may be referred to as a voltage low (VL) line, and the second line 982 may represent a line through which the black data are transmitted.

When the disable signal is applied to the first point 961, a first type transistor 962 p (e.g., a p-type MOSFET) is turned off, and a second type transistor 962 n (e.g., an n-type MOSFET) is turned on. Since the first type transistor 962 p is turned off, the white data transmitted through the first line 981 may not be output through the second type amplifier 960. On the contrary, since the second type transistor 962 n is turned on, black data transmitted through the second line 982 may be output through the second type amplifier 960. The black data may be transmitted to the pixels included in the area ‘c’ 854 c and the ‘d’ region 854 d, respectively, so that the pixels included in the areas ‘c’ and ‘d’ 854 c and 854 d may emit light at a brightness similar to that in the state where the pixels are turned off.

According to an embodiment, the second gamma block 932 may apply an enable signal to the first point 961 of the second type amplifier 960. In this case, white data may be transmitted through the first line 981, and black data may be transmitted through the second line 982. In addition, the switch 970 may be shorted such that the white data and the black data are transmitted.

When the enable signal is applied to the first point 961, the first type transistor 962 p (e.g., a p-type MOSFET) is turned on, and the second type transistor 962 n (e.g., an n-type MOSFET) is turned off. Because the second type transistor 962 n is turned off, the black data transmitted through the second line 982 may not be output through the second type amplifier 960. To the contrary, because the first type transistor 962 p is turned on, the white data transmitted through the first line 981 may be output through the second type amplifier 960. The white data may be transmitted to pixels included in the areas ‘c’ and ‘d’ 854 c and 854 d, respectively. Accordingly, the pixels included in the areas ‘c’ and ‘d’ 854 c and 854 d may emit light at the brightest brightness that the pixels can emit.

Referring to FIG. 9C, the gamma block 930 may include the first and second gamma blocks 931 and 932. The first gamma block 931 may generate a grayscale voltage and transmit the grayscale voltage to an area to which image data are to be output. The grayscale voltage may be any one of voltages obtained by dividing a specified voltage into a plurality of levels. For example, when 0 V to 4.4 V are divided into 256 levels, the grayscale voltage may be one of 256 voltages. Pixels receiving the grayscale voltage may emit light based on the magnitude of the grayscale voltage. For example, a pixel receiving a voltage of 2 V may be brighter than a pixel receiving a voltage of 1 V.

According to an embodiment, the second gamma block 932 may generate the black data or white data and transmit the generated black data or white data to an area to which the image data are not output. In the above-described example, the black data may be 0 V and the white data may be 4.4 V. Because 0 V or 4.4 V is transmitted to an area to which the image data are not output, the pixels included in the area may emit light at the lowest brightness or at the brightest brightness.

The logic block 980 may transmit image data stored in the GRAM 810 to a specified area of the display panel 850. The display panel 850 receiving the image data may output the image data (or an image corresponding to the image data).

FIG. 10 is a flowchart illustrating an operation of a display according to an embodiment. The flowchart shown in FIG. 10 is an operation flowchart of the display 800 shown in FIGS. 9A and 9B.

Referring to FIG. 10, in operation 1010, the gate driver 830 may turn on the plurality of pixels in a specified order. For example, the gate driver 830 may turn on the pixels arranged close to the gate driver 830. In addition, the gate driver 830 may apply the gate signal in the order from the gate line arranged at the top end (e.g., 854 a of FIG. 8) of the display panel 850 to the gate line arranged at the bottom end (e.g., 854 b of FIG. 8) of the display panel 850. The pixels to which the gate signal is applied may be turned on.

In operation 1020, the controller 820 may determine whether the turned-on pixels are pixels to which image data are to be output. For example, the controller 820 may determine whether the turned-on pixels are pixels to which image data are to be output based on the data address and/or the size of the image data on the GRAM 810. The controller 820 may perform operation 1030 when the turned-on pixels are pixels to which image data are to be output, and may perform operation 1050 when the turned-on pixels do not output image data.

When the turned-on pixels are pixels to which image data are to be output, in operation 1030, the controller 820 may connect the pixels to the first type amplifiers (e.g., 941 of FIG. 9A). The controller 820 may transmit the grayscale voltage and the image data to the pixels through the first type amplifiers. In the disclosure, the first type amplifier may be referred to as a source amplifier.

In operation 1040, each of the pixels may emit light at a brightness corresponding to the received grayscale voltage. For example, a first pixel may emit light at a first brightness, a second pixel may emit light at a second brightness, and an n-th pixel may emit light with an n-th brightness. The light emitted from the first to n-th pixels may form image data (e.g., an image).

When the turned-on pixels are pixels to which image data are not output, in operation 1050, the controller 820 may connect the pixels to the second type amplifiers (e.g., 960 of FIG. 9A). The controller 820 may transmit the black data to the pixels through the second type amplifiers. In the disclosure, the second type amplifier may be referred to as an inverter.

In operation 1060, each pixel may emit light at the brightness corresponding to the black data. For example, the pixels may emit light at a brightness similar to that in the state where pixels are turned off.

FIG. 11A is a view illustrating that image data are output to a portion of a display panel according to an embodiment. FIG. 11B is a view illustrating an operation timing of a gate driver, a first type amplifier, and a second type amplifier according to an embodiment. The operation timing shown in FIG. 11B is an operation timing for outputting image data to the area shown in FIG. 11A.

Referring to FIG. 11A, the image data may not be output through the pixels connected to a first data line 1111 to an 1-th data line 1110 l and pixels connected to an m-th data line 1110 m and an n-th data line 1110 n. Accordingly, each of the pixels may be connected to the second type amplifier (e.g., 960 of FIG. 9A). In addition, the black data may be transmitted to each of the pixels through the second type amplifiers 960. Thus, the pixels may emit light at a brightness similar to that in a state where the pixels are turned off.

On the contrary to the above-described example, the image data may be output through pixels connected to the 1-th data line 1110 l to the m-th data line 1110 m. Therefore, each of the pixels may be connected to the first type amplifiers (e.g., 941 of FIG. 9A). In addition, the grayscale voltage and image data may be transmitted to each of the pixels through the first type amplifiers 941. Thus, the pixels may emit light based on the magnitude of the grayscale voltage.

Referring to FIG. 11B, the gate driver 830 may sequentially transmit a gate signal to the pixels from a first gate line 1121 to an n-th gate line 1120 n. Thus, the pixels connected from the first gate line 1121 to the n-th gate line 1120 n may be sequentially turned on. In this case, the source driver 840 may transmit the grayscale voltage and the image data to the pixels connected to the 1-th data line 1110 l to the m-th data line 1110 m through the first type amplifiers 941. To the contrary, the source driver 840 may transmit the black data to the pixels connected to the first data line 1111 to the 1-th data line 1110 l and the pixels connected to the m-th data line 1110 m and the n-th data line 1110 n through the second type amplifiers 960.

FIG. 12A is a view illustrating that image data are output to a portion of a display panel according to another embodiment. FIG. 12B is a view illustrating that an operation timing of a gate driver, a first type amplifier, and a second type amplifier according to another embodiment. The operation timing shown in FIG. 12B is an operation timing for outputting image data to the area shown in FIG. 12A.

Referring to FIG. 12A, the image data may not be output through the pixels connected to the first gate line 1121 to an 1-th gate line 1120 l and the pixels connected to an m-th gate line 1120 m and the n-th gate line 1120 n. Thus, each of the pixels may be connected to the second type amplifiers (e.g., 960 of FIG. 9B). In addition, the black data may be transmitted to the pixels through the second type amplifiers 960, respectively. Thus, the pixels may emit light at a brightness similar to that in the state the pixels are turned off.

On the contrary to the above-described example, the image data may be output through the pixels connected to the 1-th gate line 1120 l to the m-th gate line 1120 m. Accordingly, each of the pixels may be connected to first type amplifiers (e.g., 941 of FIG. 9B). In addition, a grayscale voltage may be applied to each of the pixels through the first type amplifiers 941. Thus, the pixels may emit light based on the magnitude of the grayscale voltage.

Referring to FIG. 12B, the gate driver 830 may sequentially transmit the gate signal to the pixels from the first gate line 1121 to the 1-th gate line 1120 l. In this case, the source driver 840 may transmit the black data to the pixels connected to the first data line 1111 to n-th data line 1110 n through the second amplifiers. Thus, the pixels connected to the first gate line 1121 to the 1-th gate line 1120 l may emit light at a brightness similar to that in the state where the pixels are turned off.

In addition, the gate driver 830 may sequentially transmit the gate signal to the pixels from the 1-th gate line 1120 l to the m-th gate line 1120 m. In this case, the source driver 840 may transmit the grayscale voltage and the image data to the pixels connected to the first data line 1111 to the n-th data line 1110 n through the first type amplifiers 941. Thus, the pixels connected to the 1-th gate line 1120 l to the m-th gate line 1120 m may emit light based on the magnitude of the grayscale voltage.

In addition, the gate driver 830 may sequentially transmit the gate signal to the pixels from the m-th gate line 1120 m to the n-th gate line 1120 n. In this case, the source driver 840 may transmit the black data to the pixels connected to the first data line 1111 to n-th data line 1110 n through the second amplifiers. Thus, the pixels connected to the m-th gate line 1120 m to the n-th gate line 1120 n may emit light at a brightness similar to that in the state in which the pixels are turned off.

FIG. 13A is a view illustrating that image data are output to all areas of a display panel according to an embodiment. FIG. 13B is a view illustrating that image data are output in an area except for a corner of a display panel according to an embodiment. FIG. 13C is a view illustrating a display panel in which image data are output to area ‘a’ according to an embodiment. FIG. 13D is a view illustrating a display panel in which image data are output to area ‘b’ according to an embodiment. FIG. 13E is a view illustrating a display panel in which image data are output to areas ‘a’ and ‘b’ according to an embodiment.

FIG. 13F is a view illustrating a display panel in which image data are output to a front area and area ‘a’ according to an embodiment. FIG. 13G is a view illustrating a display panel in which image data are output to a front area and area ‘b’ according to an embodiment. FIG. 13H is a view illustrating a display panel in which image data are output to area ‘c’ according to an embodiment. FIG. 13I is a view illustrating a display panel in which image data are output to area ‘d’ according to an embodiment. FIG. 13J is a view illustrating a display panel in which image data are output to areas ‘c’ and ‘d’ according to an embodiment.

Referring to FIG. 13A, the source driver 840 may output image data through the entire area of the display panel 850. For example, when the gate driver 830 turns on the pixels, the source driver 840 may transmit the grayscale voltage and image data to the entire area of the display panel 850 through the first amplifiers. The pixels to which the grayscale voltage is applied may emit light based on the magnitude of the grayscale voltage.

Referring to FIG. 13B, the image data may be output in areas except for corners. In this case, the black data may be transmitted to the corners, and the grayscale voltage and the image data may be transmitted to the areas except for the corners.

Referring to FIGS. 13C to 13E, the source driver 840 may output the image data through area ‘a’ 854 a and/or area ‘b’ 854 b. In this case, the grayscale voltage and the image data may be transmitted to the area ‘a’ 854 a and/or the area ‘b’ 854 b. The black data may be transmitted to the remaining areas except for the area to which the grayscale voltage and the image data are transmitted.

Referring to FIGS. 13F and 13G, the source driver 840 may output the image data through the front area 852 and the area ‘a’ 854 a or the front area 852 and the area ‘b’ 854 b. In this case, the grayscale voltage and the image data may be transmitted to the front area 852 and the area ‘a’ 854 a, or the front area 852 and the area ‘b’ 854 b. The black data may be transmitted to the remaining areas except for the area to which the grayscale voltage and the image data are transmitted.

Referring to FIGS. 13H to 13J, the source driver 840 may output the image data through the area ‘c’ 854 c and/or the area ‘d’. In this case, the grayscale voltage and the image data may be transmitted to the area ‘c’ 854 c and/or the area ‘d’. The black data may be transmitted to the remaining areas except for the areas to which the grayscale voltage and the image data are transmitted.

FIG. 14 is a block diagram of an electronic device according to another embodiment.

Referring to FIG. 14, an electronic device 1400 may include an application processor (AP) 1410, a micro control unit (MCU) 1420, and a display driver IC (DDI) 1430, and a display panel 1450.

The application processor 1410 may include a display controller 1411, a compression encoder 1412, and a mobile industry processor interface (MIPI) transmission module 1413. The display controller 1411 may generate image data. The compression encoder 1412 may encode the image data in a specified scheme. According to an embodiment, the process of encoding the image data may be omitted or bypassed. The MIPI transmission module 1413 may transmit encoded image data and/or unencoded image data to the DDI 1430.

The MCU 1420 may include a display controller 1421, a compression encoder 1422, and a serial interface transmission module 1423. The display controller 1421 may generate control information for selecting or controlling image data to be output to the display panel 1450. The compression encoder 1422 may encode the generated control information. According to an embodiment, the process of encoding the control information may be omitted or bypassed. The serial interface transmission module 1423 may transmit the encoded control information and/or unencoded control information to the DDI 1430. Unlike the example shown in FIG. 14, the MCU 1420 may be included in the application processor 1410.

The DDI 1430 may include a MIPI receiving module 1431, a MIPI display serial interface 1432, a serial interface receiving module 1433, an interface controller 1434, and a GRAM 1435, a command controller 1436, a GRAM controller 1437, a timing controller 1438, an internal oscillator 1439, a compression encoder 1440, an up-scaler 1441, an image processing IP 1442, a shift register 1443, a gate driver 1444, and a source driver 1445.

The MIPI receiving module 1431 may receive the encoded image data and/or the unencoded image data from the MIPI transmission module 1413.

The MIPI display serial interface 1432 may set an address at which the image data received by the MIPI receiving module 1431 is to be stored in the GRAM 1435.

The serial interface receiving module 1433 may receive the encoded control information and/or the unencoded control information from the serial interface transmission module 1423.

The interface controller 1434 may control the GRAM 1435 to store image data. According to an embodiment, the interface controller 1434 may control the GRAM 1435 to store image data at an address set by the MIPI display serial interface 1432. In addition, the interface controller 1434 may transmit control information to the command controller 1436.

The GRAM 1435 may store encoded image data and/or unencoded image data. In this case, the GRAM 1435 may store image data at an address set by the MIPI display serial interface 1432.

The command controller 1436 may control the GRAM controller 1435, the timing controller 1438, and the internal oscillator 1439 based on the control information. For example, the command controller 1436 may control the GRAM controller 1437 to select at least a piece of image data stored in the GRAM 1435. In addition, the command controller 1436 may enable the timing controller 1438 to control the driving timing of the gate driver 1444 and the source driver 1445. The signal for controlling the timing controller 1438 may be transmitted directly to the timing controller 1438, and may be transmitted to the timing controller 1438 through the internal oscillator 1439.

The GRAM controller 1437 may select at least a piece of the image data stored in the GRAM 1435. For example, the GRAM controller 1437 may select at least a piece of the image data based on the address of the image data and/or the size of the image data.

The compression encoder 1440 may encode the selected image data. The size of the selected image data may be reduced through the encoding process.

The up-scaler 1441 may enlarge the image data at a specified magnification.

The image processing IP 1442 may improve the image quality of the image data. Although not shown, the image processing IP 1442 may include a pixel data processing circuit, a pre-processing circuit, a gating circuit, and the like.

The shift register 1443 may change a position at which image data are output on the display.

The gate driver 1444 and the source driver 1445 may correspond to the gate driver 830 and the source driver 840 described with reference to FIG. 8.

The display panel 1450 may output image data.

According to an embodiment of the disclosure, a display may include a display panel including a plurality of pixels, a gate driver electrically connected to each of the plurality of pixels, a source driver including first type amplifiers and second type amplifiers selectively connected to each of the plurality of pixels, a graphic random access memory (GRAM) that stores image data, and a controller electrically connected to the gate driver, the source driver, and the GRAM, where the controller may turn on the plurality of pixels through gate driver, connect a first pixel area to which the image data are output to the first type amplifiers, and connect a second pixel area to which the image data are not output to the second type amplifiers in a state where the plurality of pixels are turned on, transmit a first signal to the first pixel area to allow the first pixel area to output the image data, and transmit a second signal to the second pixel area to allow the second pixel area to emit light at a specified brightness.

According to an embodiment of the disclosure, the first signal may include a grayscale voltage for controlling brightness of each of the pixels, and the second signal may include a voltage signal in a specified range of the grayscale voltage.

According to an embodiment of the disclosure, the source driver may further include a first gamma block connected to the first type amplifiers and a second gamma block connected to the second type amplifiers, and the controller may generate the first signal by using the first gamma block and generate the second signal by using the second gamma block.

According to an embodiment of the disclosure, the source driver may further include one or more switches that connect the first gamma block to the first type amplifiers and connect the second gamma block to the second type amplifiers.

According to an embodiment of the disclosure, the controller may short the switches when the pixels are turned on.

According to an embodiment of the disclosure, the second type amplifier may include a first transistor that is turned on when receiving a disable signal from the second gamma block, and a second transistor that is turned on when receiving an enable signal from the second gamma block.

According to an embodiment of the disclosure, the controller may transmit the second signal to the second pixel area through the first transistor when the second type amplifier receives the disable signal from the second gamma block.

According to an embodiment of the disclosure, the display may further include a first gate line arranged at a first edge of the display panel, an n-th gate line arranged at a second edge positioned in opposite to the first edge on the display panel, and at least one gate line arranged between the first gate line and the n-th gate line.

According to an embodiment of the disclosure, the controller may turn on pixels connected to the first gate line, pixels connected to the at least one gate line, and pixels connected to the n-th gate line in order, respectively.

According to an embodiment of the disclosure, the controller may turn on pixels connected to the first gate line in an order of shorter distance from the gate driver among the pixels connected to the first gate line.

According to an embodiment of the disclosure, the controller may set the first pixel area based on an address of the image data or a size of the image data.

According to an embodiment of the disclosure, the first type amplifiers may include a source amplifier and the second type amplifiers may include an inverter.

According to an embodiment of the disclosure, an electronic device may include a housing that includes a first surface, a second surface facing the first surface, and a side surface surrounding a space between the first and second surfaces, a display panel exposed through the first surface and a portion of the side surface of the housing, a processor that generates image data, a graphic random access memory (GRAM) that stores at least a piece of the image data, and a controller that selects at least a piece of the stored image data and outputs the selected part to a specified area of the display panel, where the specified area of the display panel corresponds to at least a portion of the side surface.

According to an embodiment of the disclosure, the controller may enlarge the selected part at a specified magnification and output to a specified area of the display panel.

According to an embodiment of the disclosure, the processor may encode the image data in a specified scheme, and the GRAM may store the encoded image data.

According to an embodiment of the disclosure, the controller may select at least a piece of the encoded image data, decode the selected piece, and output the decoded piece to a specified area of the display panel.

According to an embodiment of the disclosure, the controller may select at least a piece of the image data based on an address of the image data or a size of the image data.

According to an embodiment of the disclosure, the controller may select at least a piece of the stored image data under a specified condition.

According to an embodiment of the disclosure, the electronic device may further include first type amplifiers and second type amplifiers that are selectively connected to each of pixels included in the display panel.

According to an embodiment of the disclosure, the controller may connect the first type amplifiers to pixels included in the specified area, respectively, output the selected piece through the pixels connected to the first type amplifiers, connect the second type amplifiers to pixels except for the pixels included in the specified area, respectively, and allow the pixels connected to the second type amplifiers to emit light at a specified brightness.

FIG. 15 illustrates an electronic device in a network environment system, according to various embodiments.

Referring to FIG. 15, according to various embodiments, an electronic device 1501, a first electronic device 1502, a second electronic device 1504, or a server 1506 may be connected each other over a network 1562 or a short range communication 1564. The electronic device 1501 may include a bus 1510, a processor 1520, a memory 1530, an input/output interface 1550, a display 1560, and a communication interface 1570. According to an embodiment, the electronic device 1501 may not include at least one of the above-described components or may further include other component(s).

For example, the bus 1510 may interconnect the above-described components 1510 to 1570 and may include a circuit for conveying communications (e.g., a control message and/or data) among the above-described components.

The processor 1520 may include one or more of a central processing unit (CPU), an application processor (AP), or a communication processor (CP). For example, the processor 1520 may perform an arithmetic operation or data processing associated with control and/or communication of at least other components of the electronic device 1501.

The memory 1530 may include a volatile and/or nonvolatile memory. For example, the memory 1530 may store commands or data associated with at least one other component(s) of the electronic device 1501. According to an embodiment, the memory 1530 may store software and/or a program 1540. The program 1540 may include, for example, a kernel 1541, a middleware 1543, an application programming interface (API) 1545, and/or an application program (or “an application”) 1547. At least a part of the kernel 1541, the middleware 1543, or the API 1545 may be referred to as an “operating system (OS)”.

For example, the kernel 1541 may control or manage system resources (e.g., the bus 1510, the processor 1520, the memory 1530, and the like) that are used to execute operations or functions of other programs (e.g., the middleware 1543, the API 1545, and the application program 1547). Furthermore, the kernel 1541 may provide an interface that allows the middleware 1543, the API 1545, or the application program 1547 to access discrete components of the electronic device 1501 so as to control or manage system resources.

The middleware 1543 may perform, for example, a mediation role such that the API 1545 or the application program 1547 communicates with the kernel 1541 to exchange data.

Furthermore, the middleware 1543 may process task requests received from the application program 1547 according to a priority. For example, the middleware 1543 may assign the priority, which makes it possible to use a system resource (e.g., the bus 1510, the processor 1520, the memory 1530, or the like) of the electronic device 1501, to at least one of the application program 1547. For example, the middleware 1543 may process the one or more task requests according to the priority assigned to the at least one, which makes it possible to perform scheduling or load balancing on the one or more task requests.

The API 1545 may be, for example, an interface through which the application program 1547 controls a function provided by the kernel 1541 or the middleware 1543, and may include, for example, at least one interface or function (e.g., an instruction) for a file control, a window control, image processing, a character control, or the like.

The input/output interface 1550 may play a role, for example, of an interface which transmits a command or data input from a user or another external device, to other component(s) of the electronic device 1501. Furthermore, the input/output interface 1550 may output a command or data, received from other component(s) of the electronic device 1501, to a user or another external device.

The display 1560 may include, for example, a liquid crystal display (LCD), a light-emitting diode (LED) display, an organic LED (OLED) display, a microelectromechanical systems (MEMS) display, or an electronic paper display. The display 1560 may display, for example, various contents (e.g., a text, an image, a video, an icon, a symbol, and the like) to a user. The display 1560 may include a touch screen and may receive, for example, a touch, gesture, proximity, or hovering input using an electronic pen or a part of a user's body.

For example, the communication interface 1570 may establish communication between the electronic device 1501 and an external device (e.g., the first electronic device 1502, the second electronic device 1504, or the server 1506). For example, the communication interface 1570 may be connected to the network 1562 over wireless communication or wired communication to communicate with the external device (e.g., the second electronic device 1504 or the server 1506).

The wireless communication may use at least one of, for example, long-term evolution (LTE), LTE Advanced (LTE-A), Code Division Multiple Access (CDMA), Wideband CDMA (WCDMA), Universal Mobile Telecommunications System (UMTS), Wireless Broadband (WiBro), Global System for Mobile Communications (GSM), or the like, as cellular communication protocol. Furthermore, the wireless communication may include, for example, the short range communication 1564. The short range communication 1564 may include at least one of wireless fidelity (Wi-Fi), light fidelity (Li-Fi), Bluetooth, near field communication (NFC), magnetic stripe transmission (MST), a global navigation satellite system (GNSS), or the like.

The MST may generate a pulse in response to transmission data using an electromagnetic signal, and the pulse may generate a magnetic field signal. The electronic device 1501 may transfer the magnetic field signal to point of sale (POS), and the POS may detect the magnetic field signal using a MST reader. The POS may recover the data by converting the detected magnetic field signal to an electrical signal.

The GNSS may include at least one of, for example, a global positioning system (GPS), a global navigation satellite system (Glonass), a Beidou navigation satellite system (hereinafter referred to as “Beidou”), or an European global satellite-based navigation system (hereinafter referred to as “Galileo”) based on an available region, a bandwidth, or the like. Hereinafter, in the disclosure, “GPS” and “GNSS” may be interchangeably used. The wired communication may include at least one of, for example, a universal serial bus (USB), a high definition multimedia interface (HDMI), a recommended standard-232 (RS-232), a plain old telephone service (POTS), or the like. The network 1562 may include at least one of telecommunications networks, for example, a computer network (e.g., LAN or WAN), an Internet, or a telephone network.

Each of the first and second electronic devices 1502 and 1504 may be a device of which the type is different from or the same as that of the electronic device 1501. According to an embodiment, the server 1506 may include a group of one or more servers. According to various embodiments, all or a portion of operations that the electronic device 1501 will perform may be executed by another or plural electronic devices (e.g., the first electronic device 1502, the second electronic device 1504 or the server 1506). According to an embodiment, in the case where the electronic device 1501 executes any function or service automatically or in response to a request, the electronic device 1501 may not perform the function or the service internally, but, alternatively additionally, it may request at least a portion of a function associated with the electronic device 1501 from another device (e.g., the electronic device 1502 or 1504 or the server 1506). The other electronic device may execute the requested function or additional function and may transmit the execution result to the electronic device 1501. The electronic device 1501 may provide the requested function or service using the received result or may additionally process the received result to provide the requested function or service. To this end, for example, cloud computing, distributed computing, or client-server computing may be used.

FIG. 16 illustrates a block diagram of an electronic device, according to various embodiments.

Referring to FIG. 16, an electronic device 1601 may include, for example, all or a part of the electronic device 1501 illustrated in FIG. 15. The electronic device 1601 may include one or more processors (e.g., an application processor (AP)) 1610, a communication module 1620, a subscriber identification module 1624, a memory 1630, a sensor module 1640, an input device 1650, a display 1660, an interface 1670, an audio module 1680, a camera module 1691, a power management module 1695, a battery 1696, an indicator 1697, and a motor 1698.

The processor 1610 may drive, for example, an operating system (OS) or an application to control a plurality of hardware or software components connected to the processor 1610 and may process and compute a variety of data. For example, the processor 1610 may be implemented with a System on Chip (SoC). According to an embodiment, the processor 1610 may further include a graphic processing unit (GPU) and/or an image signal processor. The processor 1610 may include at least a part (e.g., a cellular module 1621) of components illustrated in FIG. 16. The processor 1610 may load a command or data, which is received from at least one of other components (e.g., a nonvolatile memory), into a volatile memory and process the loaded command or data. The processor 1610 may store a variety of data in the nonvolatile memory.

The communication module 1620 may be configured the same as or similar to the communication interface 1570 of FIG. 15. The communication module 1620 may include the cellular module 1621, a Wi-Fi module 1622, a Bluetooth (BT) module 1623, a GNSS module 1624 (e.g., a GPS module, a Glonass module, a Beidou module, or a Galileo module), a near field communication (NFC) module 1625, a MST module 1626 and a radio frequency (RF) module 1627.

The cellular module 1621 may provide, for example, voice communication, video communication, a character service, an Internet service, or the like over a communication network. According to an embodiment, the cellular module 1621 may perform discrimination and authentication of the electronic device 1601 within a communication network by using the subscriber identification module (e.g., a SIM card) 1629. According to an embodiment, the cellular module 1621 may perform at least a portion of functions that the processor 1610 provides. According to an embodiment, the cellular module 1621 may include a communication processor (CP).

Each of the Wi-Fi module 1622, the BT module 1623, the GNSS module 1624, the NFC module 1625, or the MST module 1626 may include a processor for processing data exchanged through a corresponding module, for example. According to an embodiment, at least a part (e.g., two or more) of the cellular module 1621, the Wi-Fi module 1622, the BT module 1623, the GNSS module 1624, the NFC module 1625, or the MST module 1626 may be included within one Integrated Circuit (IC) or an IC package.

For example, the RF module 1627 may transmit and receive a communication signal (e.g., an RF signal). For example, the RF module 1627 may include a transceiver, a power amplifier module (PAM), a frequency filter, a low noise amplifier (LNA), an antenna, or the like. According to another embodiment, at least one of the cellular module 1621, the Wi-Fi module 1622, the BT module 1623, the GNSS module 1624, the NFC module 1625, or the MST module 1626 may transmit and receive an RF signal through a separate RF module.

The subscriber identification module 1629 may include, for example, a card and/or embedded SIM that includes a subscriber identification module and may include unique identify information (e.g., integrated circuit card identifier (ICCID)) or subscriber information (e.g., international mobile subscriber identity (IMSI)).

The memory 1630 (e.g., the memory 1530) may include an internal memory 1632 or an external memory 1634. For example, the internal memory 1632 may include at least one of a volatile memory (e.g., a dynamic random access memory (DRAM), a static RAM (SRAM), a synchronous DRAM (SDRAM), or the like), a nonvolatile memory (e.g., a one-time programmable read only memory (OTPROM), a programmable ROM (PROM), an erasable and programmable ROM (EPROM), an electrically erasable and programmable ROM (EEPROM), a mask ROM, a flash ROM, a flash memory (e.g., a NAND flash memory or a NOR flash memory), or the like), a hard drive, or a solid state drive (SSD).

The external memory 1634 may further include a flash drive such as compact flash (CF), secure digital (SD), micro secure digital (Micro-SD), mini secure digital (Mini-SD), extreme digital (xD), a multimedia card (MMC), a memory stick, or the like. The external memory 1634 may be operatively and/or physically connected to the electronic device 1601 through various interfaces.

A security module 1636 may be a module that includes a storage space of which a security level is higher than that of the memory 1630 and may be a circuit that guarantees safe data storage and a protected execution environment. The security module 1636 may be implemented with a separate circuit and may include a separate processor. For example, the security module 1636 may be in a smart chip or a secure digital (SD) card, which is removable, or may include an embedded secure element (eSE) embedded in a fixed chip of the electronic device 1601. Furthermore, the security module 1636 may operate based on an operating system (OS) that is different from the OS of the electronic device 1601. For example, the security module 1636 may operate based on java card open platform (JCOP) OS.

The sensor module 1640 may measure, for example, a physical quantity or may detect an operation state of the electronic device 1601. The sensor module 1640 may convert the measured or detected information to an electric signal. For example, the sensor module 1640 may include at least one of a gesture sensor 1640A, a gyro sensor 1640B, a barometric pressure sensor 1640C, a magnetic sensor 1640D, an acceleration sensor 1640E, a grip sensor 1640F, the proximity sensor 1640G, a color sensor 1640H (e.g., red, green, blue (RGB) sensor), a biometric sensor 1640I, a temperature/humidity sensor 1640J, an illuminance sensor 1640K, or an UV sensor 1640M. Although not illustrated, additionally or alternatively, the sensor module 1640 may further include, for example, an E-nose sensor, an electromyography (EMG) sensor, an electroencephalogram (EEG) sensor, an electrocardiogram (ECG) sensor, an infrared (IR) sensor, an iris sensor, and/or a fingerprint sensor. The sensor module 1640 may further include a control circuit for controlling at least one or more sensors included therein. According to an embodiment, the electronic device 1601 may further include a processor that is a part of the processor 1610 or independent of the processor 1610 and is configured to control the sensor module 1640. The processor may control the sensor module 1640 while the processor 1610 remains at a sleep state.

The input device 1650 may include, for example, a touch panel 1652, a (digital) pen sensor 1654, a key 1656, or an ultrasonic input unit 1658. For example, the touch panel 1652 may use at least one of capacitive, resistive, infrared and ultrasonic detecting methods. Also, the touch panel 1652 may further include a control circuit. The touch panel 1652 may further include a tactile layer to provide a tactile reaction to a user.

The (digital) pen sensor 1654 may be, for example, a part of a touch panel or may include an additional sheet for recognition. The key 1656 may include, for example, a physical button, an optical key, a keypad, or the like. The ultrasonic input device 1658 may detect (or sense) an ultrasonic signal, which is generated from an input device, through a microphone (e.g., a microphone 1688) and may check data corresponding to the detected ultrasonic signal.

The display 1660 (e.g., the display 1560) may include a panel 1662, a hologram device 1664, or a projector 1666. The panel 1662 may be the same as or similar to the display 1560 illustrated in FIG. 15. The panel 1662 may be implemented, for example, to be flexible, transparent or wearable. The panel 1662 and the touch panel 1652 may be integrated into a single module. The hologram device 1664 may display a stereoscopic image in a space using a light interference phenomenon. The projector 1666 may project light onto a screen so as to display an image. For example, the screen may be arranged in the inside or the outside of the electronic device 1601. According to an embodiment, the display 1660 may further include a control circuit for controlling the panel 1662, the hologram device 1664, or the projector 1666.

The interface 1670 may include, for example, a high-definition multimedia interface (HDMI) 1672, a universal serial bus (USB) 1674, an optical interface 1676, or a D-subminiature (D-sub) 1678. The interface 1670 may be included, for example, in the communication interface 1570 illustrated in FIG. 15. Additionally or alternatively, the interface 1670 may include, for example, a mobile high definition link (MHL) interface, a SD card/multi-media card (MMC) interface, or an infrared data association (IrDA) standard interface.

The audio module 1680 may convert a sound and an electric signal in dual directions. At least a component of the audio module 1680 may be included, for example, in the input/output interface 1550 illustrated in FIG. 15. The audio module 1680 may process, for example, sound information that is input or output through a speaker 1682, a receiver 1684, an earphone 1686, or the microphone 1688.

For example, the camera module 1691 may shoot a still image or a video. According to an embodiment, the camera module 1691 may include at least one or more image sensors (e.g., a front sensor or a rear sensor), a lens, an image signal processor (ISP), or a flash (e.g., an LED or a xenon lamp).

The power management module 1695 may manage, for example, power of the electronic device 1601. According to an embodiment, a power management integrated circuit (PMIC), a charger IC, or a battery or fuel gauge may be included in the power management module 1695. The PMIC may have a wired charging method and/or a wireless charging method. The wireless charging method may include, for example, a magnetic resonance method, a magnetic induction method or an electromagnetic method and may further include an additional circuit, for example, a coil loop, a resonant circuit, or a rectifier, and the like. The battery gauge may measure, for example, a remaining capacity of the battery 1696 and a voltage, current or temperature thereof while the battery is charged. The battery 1696 may include, for example, a rechargeable battery and/or a solar battery.

The indicator 1697 may display a specific state of the electronic device 1601 or a part thereof (e.g., the processor 1610), such as a booting state, a message state, a charging state, and the like. The motor 1698 may convert an electrical signal into a mechanical vibration and may generate the following effects: vibration, haptic, and the like. Although not illustrated, a processing device (e.g., a GPU) for supporting a mobile TV may be included in the electronic device 1601. The processing device for supporting the mobile TV may process media data according to the standards of digital multimedia broadcasting (DMB), digital video broadcasting (DVB), MediaFlo™, or the like.

Each of the above-mentioned components of the electronic device according to various embodiments of the disclosure may be configured with one or more parts, and the names of the components may be changed according to the type of the electronic device. In various embodiments, the electronic device may include at least one of the above-mentioned components, and some components may be omitted or other additional components may be added. Furthermore, some of the components of the electronic device according to various embodiments may be combined with each other so as to form one entity, so that the functions of the components may be performed in the same manner as before the combination.

FIG. 17 illustrates a block diagram of a program module, according to various embodiments.

According to an embodiment, a program module 1710 (e.g., the program 1540) may include an operating system (OS) to control resources associated with an electronic device (e.g., the electronic device 1501), and/or diverse applications (e.g., the application program 1547) driven on the OS. The OS may be, for example, Android™, iOS™, Windows™, Symbian™, or Tizen™.

The program module 1710 may include a kernel 1720, a middleware 1730, an application programming interface (API) 1760, and/or an application 1770. At least a portion of the program module 1710 may be preloaded on an electronic device or may be downloadable from an external electronic device (e.g., the first electronic device 1502, the second electronic device 1504, the server 1506, or the like).

The kernel 1720 (e.g., the kernel 1541) may include, for example, a system resource manager 1721 or a device driver 1723. The system resource manager 1721 may perform control, allocation, or retrieval of system resources. According to an embodiment, the system resource manager 1721 may include a process managing unit, a memory managing unit, or a file system managing unit. The device driver 1723 may include, for example, a display driver, a camera driver, a Bluetooth driver, a shared memory driver, a USB driver, a keypad driver, a Wi-Fi driver, an audio driver, or an inter-process communication (IPC) driver.

The middleware 1730 may provide, for example, a function that the application 1770 needs in common, or may provide diverse functions to the application 1770 through the API 1760 to allow the application 1770 to efficiently use limited system resources of the electronic device. According to an embodiment, the middleware 1730 (e.g., the middleware 1543) may include at least one of a runtime library 1735, an application manager 1741, a window manager 1742, a multimedia manager 1743, a resource manager 1744, a power manager 1745, a database manager 1746, a package manager 1747, a connectivity manager 1748, a notification manager 1749, a location manager 1750, a graphic manager 1751, a security manager 1752, an expansion screen manager 1753, or a payment manager 1754.

The runtime library 1735 may include, for example, a library module that is used by a compiler to add a new function through a programming language while the application 1770 is being executed. The runtime library 1735 may perform input/output management, memory management, or capacities about arithmetic functions.

The application manager 1741 may manage, for example, a life cycle of at least one application of the application 1770. The window manager 1742 may manage a graphic user interface (GUI) resource that is used in a screen. The multimedia manager 1743 may identify a format necessary for playing diverse media files, and may perform encoding or decoding of media files by using a codec suitable for the format. The resource manager 1744 may manage resources such as a storage space, memory, or source code of at least one application of the application 1770.

The power manager 1745 may operate, for example, with a basic input/output system (BIOS) to manage a capacity and a temperature of a battery or power, and may determine or provide power information for an operation of an electronic device using the corresponding information. The database manager 1746 may generate, search for, or modify database that is to be used in at least one application of the application 1770. The package manager 1747 may install or update an application that is distributed in the form of package file.

The connectivity manager 1748 may manage, for example, wireless connection such as Wi-Fi or Bluetooth. The notification manager 1749 may display or notify an event such as arrival message, appointment, or proximity notification in a mode that does not disturb a user. The location manager 1750 may manage location information about an electronic device. The graphic manager 1751 may manage a graphic effect that is provided to a user, or manage a user interface relevant thereto. The security manager 1752 may provide a general security function necessary for system security, user authentication, or the like. For example, the expansion screen manager 1753 may determine an area of the display on which the graphic is displayed. According to an embodiment, the expansion screen manager 1753 may manage information, a graphic effect, or a user interface associated with this to be provided through the area of the display determined to display the graphic.

According to an embodiment, in the case where an electronic device (e.g., the electronic device 1501) includes a telephony function, the middleware 1730 may further include a telephony manager for managing a voice or video call function of the electronic device. The middleware 1730 may include a middleware module that combines diverse functions of the above-described components. The middleware 1730 may provide a module specialized to each OS kind to provide differentiated functions. Additionally, the middleware 1730 may dynamically remove a part of the preexisting components or may add new components thereto.

The API 1760 (e.g., the API 1545) may be, for example, a set of programming functions and may be provided with a configuration that is variable depending on an OS. For example, in the case where an OS is Android™ or iOS™, it may provide one API set per platform. In the case where an OS is Tizen™, it may provide two or more API sets per platform.

The application 1770 (e.g., the application program 1547) may include, for example, one or more applications capable of providing functions for a home 1771, a dialer 1772, an SMS/MMS 1773, an instant message (IM) 1774, a browser 1775, a camera 1776, an alarm 1777, a contact 1778, a voice dial 1779, an e-mail 1780, a calendar 1781, a media player 1782, an album 1783, a timepiece 1784, and a payment 1785 or for offering health care (e.g., measuring an exercise quantity, blood sugar, or the like) or environment information (e.g., information of barometric pressure, humidity, temperature, or the like).

According to an embodiment, the application 1770 may include an application (hereinafter referred to as “information exchanging application” for descriptive convenience) to support information exchange between an electronic device (e.g., the electronic device 1501) and an external electronic device (e.g., the first electronic device 1502 or the second electronic device 1504). The information exchanging application may include, for example, a notification relay application for transmitting specific information to an external electronic device, or a device management application for managing the external electronic device.

For example, the notification relay application may include a function of transmitting notification information, which arise from other applications (e.g., applications for SMS/MMS, e-mail, health care, or environmental information), to an external electronic device. Additionally, the notification relay application may receive, for example, notification information from an external electronic device and provide the notification information to a user.

The device management application may manage (e.g., install, delete, or update), for example, at least one function (e.g., turn-on/turn-off of an external electronic device itself (or a part) or adjustment of brightness (or resolution) of a display) of the external electronic device which communicates with the electronic device, an application running in the external electronic device, or a service (e.g., a call service, a message service, or the like) provided from the external electronic device.

According to an embodiment, the application 1770 may include an application (e.g., a health care application of a mobile medical device) that is assigned in accordance with an attribute of an external electronic device. According to an embodiment, the application 1770 may include an application that is received from an external electronic device (e.g., the first electronic device 1502, the second electronic device 1504, or the server 1506). According to an embodiment, the application 1770 may include a preloaded application or a third party application that is downloadable from a server. The names of components of the program module 1710 according to the embodiment may be modifiable depending on kinds of operating systems.

According to various embodiments, at least a portion of the program module 1710 may be implemented by software, firmware, hardware, or a combination of two or more thereof. At least a portion of the program module 1710 may be implemented (e.g., executed), for example, by the processor (e.g., the processor 1610). At least a portion of the program module 1710 may include, for example, modules, programs, routines, sets of instructions, processes, or the like for performing one or more functions.

The term “module” used in the disclosure may represent, for example, a unit including one or more combinations of hardware, software and firmware. The term “module” may be interchangeably used with the terms “unit”, “logic”, “logical block”, “part” and “circuit”. The “module” may be a minimum unit of an integrated part or may be a part thereof. The “module” may be a minimum unit for performing one or more functions or a part thereof. The “module” may be implemented mechanically or electronically. For example, the “module” may include at least one of an application-specific IC (ASIC) chip, a field-programmable gate array (FPGA), and a programmable-logic device for performing some operations, which are known or will be developed.

At least a part of an apparatus (e.g., modules or functions thereof) or a method (e.g., operations) according to various embodiments may be, for example, implemented by instructions stored in a computer-readable storage media in the form of a program module. The instruction, when executed by a processor (e.g., the processor 1520), may cause the one or more processors to perform a function corresponding to the instruction. The computer-readable storage media, for example, may be the memory 1530.

A computer-readable recording medium may include a hard disk, a floppy disk, a magnetic media (e.g., a magnetic tape), an optical media (e.g., a compact disc read only memory (CD-ROM) and a digital versatile disc (DVD), a magneto-optical media (e.g., a floptical disk)), and hardware devices (e.g., a read only memory (ROM), a random access memory (RAM), or a flash memory). Also, the one or more instructions may contain a code made by a compiler or a code executable by an interpreter. The above hardware unit may be configured to operate via one or more software modules for performing an operation according to various embodiments, and vice versa.

A module or a program module according to various embodiments may include at least one of the above components, or a part of the above components may be omitted, or additional other components may be further included. Operations performed by a module, a program module, or other components according to various embodiments may be executed sequentially, in parallel, repeatedly, or in a heuristic method. In addition, some operations may be executed in different sequences or may be omitted. Alternatively, other operations may be added.

While the disclosure has been shown and described with reference to various embodiments thereof, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the disclosure as defined by the appended claims and their equivalents. 

1. A display comprising: a display panel including a plurality of pixels; a gate driver electrically connected to each of the plurality of pixels; a source driver including first type amplifiers and second type amplifiers selectively connected to each of the plurality of pixels; a graphic random access memory (GRAM) configured to store image data; and a controller electrically connected to the gate driver, the source driver, and the GRAM, wherein the controller is configured to: turn on the plurality of pixels through the gate driver; connect a first pixel area to which the image data are output to the first type amplifiers and connect a second pixel area to which the image data are not output to the second type amplifiers in a state where the plurality of pixels are turned on; transmit a first signal to the first pixel area to allow the first pixel area to output the image data; and transmit a second signal to the second pixel area to allow the second pixel area to emit light at a specified brightness.
 2. The display of claim 1, wherein the first signal includes a grayscale voltage for controlling brightness of each of the pixels, and the second signal includes a voltage signal in a specified range of the grayscale voltage.
 3. The display of claim 1, wherein the source driver further includes a first gamma block connected to the first type amplifiers and a second gamma block connected to the second type amplifiers, and wherein the controller is configured to generate the first signal by using the first gamma block and generate the second signal by using the second gamma block.
 4. The display of claim 3, wherein the source driver further includes one or more switches configured to connect the first gamma block to the first type amplifiers and connect the second gamma block to the second type amplifiers.
 5. The display of claim 4, wherein the controller is configured to short the switches when the pixels are turned on.
 6. The display of claim 3, wherein the second type amplifier includes a first transistor configured to be turned on when receiving a disable signal from the second gamma block; and a second transistor configured to be turned on when receiving an enable signal from the second gamma block.
 7. The display of claim 6, wherein the controller is configured to transmit the second signal to the second pixel area through the first transistor when the second type amplifier receives the disable signal from the second gamma block.
 8. The display of claim 1, further comprising: a first gate line arranged at a first edge of the display panel; an n-th gate line arranged at a second edge positioned in opposite to the first edge on the display panel; and at least one gate line arranged between the first gate line and the n-th gate line.
 9. The display of claim 8, wherein the controller is configured to turn on pixels connected to the first gate line, pixels connected to the at least one gate line, and pixels connected to the n-th gate line in order, respectively.
 10. The display of claim 8, wherein the controller is configured to turn on pixels connected to the first gate line in an order of shorter distance from the gate driver among the pixels connected to the first gate line.
 11. The display of claim 1, wherein the controller is configured to set the first pixel area based on an address of the image data or a size of the image data.
 12. The display of claim 1, wherein the first type amplifiers include a source amplifier and the second type amplifiers include an inverter.
 13. An electronic device comprising: a housing including a first surface, a second surface facing the first surface, and a side surface surrounding a space between the first and second surfaces; a display panel exposed through the first surface and a portion of the side surface of the housing; a processor configured to generate image data; a graphic random access memory (GRAM) configured to store at least a piece of the image data; and a controller configured to select at least a piece of the stored image data and output the selected part to a specified area of the display panel, wherein the specified area of the display panel corresponds to at least a portion of the side surface.
 14. The electronic device of claim 13, wherein the controller is configured to enlarge the selected part at a specified magnification and output to a specified area of the display panel.
 15. The electronic device of claim 13, wherein the processor is configured to encode the image data in a specified scheme, and wherein the GRAM is configured to store the encoded image data. 